ISC system circuit diagram (old title: ALS system circuit diagram)

Document #:

JGW-D1808394-v12

Document type:

D

Submitted by:

Kiwamu Izumi

Updated by:

Kiwamu Izumi

Document Created:

18 Jun 2018, 11:34

Contents Revised:

01 Feb 2019, 15:54

DB Info Revised:

01 Feb 2019, 16:22

Abstract:

This is a diagram showing all the electronics necessary for the ISC subsystem.

Files in Document:

• D1808394_v12_ISCdiagram.pdf (211.9 kB)

Other Files:

• D1808394_v12_ISCdiagram.graffle (134.0 kB)

Topics:

• Detector:Interferometer Sensing and Control
• Activity:KAGRA

Authors:

• Kiwamu Izumi
• Yuta Michimura

Keywords:

KAGRA MIF ALS commissioning lock acquisition electronics diagram

Notes and Changes:

v12: Added a power splitter for each of the two N5181B to explicitly display that they don't need an rf distribution amplifier.
v12: Added a DB9 connection from the back of the dual IQ dmod for CARM to the whitening which was originally meant for POY only.
v12: Added an rf distribution amplifier in the IOO rack so that it produces multiple 2f1 signals for creating the 3f2 signals.
v12: Updated the JGW number for the dual I and Q demodulators.

Related Documents:

• JGW-D1808129: bKAGRA phase 1 LSC cabling

Referenced by:

• JGW-T1707586: List of RF Cables to Purchase for bKAGRA
• JGW-D1909844: Rack design schematic for OMC1
• JGW-D1909823: Rack design schematic for OMC0
• JGW-E1605517: MIF Documents and Drawings Tree
• JGW-T2112593: Cable diagram (PSL, IOO, IOO1, ALS0, ALS1, LSC0, ASC0)
• JGW-D2112925: As Built PSL/ALS Table Layout
• JGW-T2112955: Concept of modified Fiber Noise Cancellation
• JGW-T2113025: ALS ADC list